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Guide to Computer Processor Architecture: A RISC-V Approach, with High-Level Synthesis (Undergraduate Topics in Computer Science)

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Description

This unique, accessible textbook presents a succession of implementations of the open-source RISC-V processor. Implementations are offered in increasing difficulty (non-pipelined, pipelined, deeply pipelined, multi-threaded, multicore). Each implementation is shown as a High-Level Synthesis (HLS) code in C++. This facilitates synthesis and testing on an FPGA-based development board (Such a board can be freely obtained from the Xilinx University Program targeting university professors). The book can be useful for several reasons. First, it is a novel way to introduce computer architecture: The codes given can serve as labs for a processor architecture course. Second, the book content is based on the RISC-V Instruction Set Architecture, which is an open- source machine language promising to become the main machine language to be taught, replacing DLX and MIPS. Third, all the designs are implemented through the HLS tool, which is able to translate a C program into an intellectual property (IP). Lastly, HLS will become the new standard for IP implementations, replacing Verilog/VHDL; already there are job positions tied to HLS, with the argument of rapid IP development. Hence, in addition to offering undergraduates a firm introduction, the textbook/guide can also serve engineers willing to implement processors on FPGA, as well as researchers willing to develop RISC-V based hardware simulators. Bernard Goossens is Professor in the Faculty of Sciences at the Université de Perpignan, France. He is author of the French-language book from Springer, Architecture et microarchitecture des processeurs, 2002. Read more

Publisher ‏ : ‎ Springer; 1st ed. 2023 edition (January 26, 2023)


Language ‏ : ‎ English


Paperback ‏ : ‎ 464 pages


ISBN-10 ‏ : ‎ 3031180224


ISBN-13 ‏ : ‎ 24


Item Weight ‏ : ‎ 1.7 pounds


Dimensions ‏ : ‎ 5.83 x 0.63 x 8.98 inches


Best Sellers Rank: #2,486,752 in Books (See Top 100 in Books) #107 in Computer Hardware Design #194 in Microprocessor Design #503 in Computer Hardware Design & Architecture


#107 in Computer Hardware Design:


#194 in Microprocessor Design:


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If you place your order now, the estimated arrival date for this product is: Thursday, Oct 9

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Top Amazon Reviews


  • Good coverage but very hard to read and understand
This book offers hands-on tutorials on how to program and test RISC-V processors on an FPGA board (like the PYNQ Z2 I’m using), from single-core to multi-hart to multi-core. It's fairly straightforward to follow along, which I’m doing on a Linux-running Thinkpad. But, perhaps due to the fact this book was probably translated from French, it's really unpleasant to read if you try to understand what the author is really doing and accomplishing in each step. There're a lot of grammatical mistakes, and the language is really awkward to the point of being frustrating most of the time. The steps are not hard to follow along but the ideas behind them are just not explained clearly at all. The fonts used for code and text are also hard on the eye, making the learning experience less than ideal. ... show more
Reviewed in the United States on November 1, 2023 by Old-and-Wise

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